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MICRF500
Applications Information
VCO and PLL Section
DIFV DD
Micrel
The frequency synthesizer consists of a VCO, crystal oscilla-
tor, dual-modulus prescaler, programmable frequency divid-
C36
1n
Pin 12
ers, phase-detector, charge pump, lock detector and an
external loop filter. The dual-modulus prescaler divides the
VCO-frequency by 64/65. This mode is controlled by the A-
10MHz
C20
2-6p
C22
5.6p
Pin 13
XOSCOUT
divider. There are two sets of M, N and A-frequency dividers.
Using both sets in transmit mode, FSK can be implemented
by switching between those two sets. The phase-detector is
a frequency/phase detector with back slash pulses to mini-
mize phase noise. The VCO, crystal oscillator, charge pump,
lock detector and the loop filter will be described in detail
below.
Voltage Controlled Oscillator (VCO)
VDD
Pin 5
R7
20k
C21
47p
DIGGND
Figure 4. Crystal Oscillator
The crystal oscillator is tuned by varying the trimming capaci-
tor C20. The drift of the RF frequency is the same as the drift
of crystal frequency when measured in ppm. The total differ-
ence in ppm, ? f(ppm), between the tuned RF frequency and
the drifted frequency is given by:
? f(ppm) = S T × ? T + n × ? t
where:
loopfilter_output
R8
39k
C38
D1
SMV1215
L1
12nH
C13
4.7p
Pin 6
OSCOUT
? S T is the total temperature coefficient of the oscillator
frequency (due to crystal and components) in ppm ° C.
? ? T is the change in temperature from room
temperature, at which the crystal was tuned.
Pin 7
Figure 3. VCO
The circuit schematic of the VCO with external components
is shown in Figure 3. The VCO is basically a Colpitts oscilla-
tor. The oscillator has an external resonator and varactor.
The resonator consists of inductor L1 and the series connec-
tion of capacitor C13, the internal capacitance and the
capacitance of the varactor. The capacitance of the varactor
(D1) decreases as the input voltage increases. The VCO
frequency will therefore increase as the input voltage in-
creases. The VCO has a positive gain (MHz/Volt). If neces-
sary a parallel capacitor can be added next to D1 to bring the
VCO tuning voltage to its middle range or VDD/2, which is
measured at Pin 9 - CMPOUT.
If the value of capacitor C13 becomes too small the amplitude
of the VCO signal decreases, which leads to lower output
power.
The layout of the VCO is very critical. The external compo-
nents should be placed as close to the input pin (Pin 6) as
possible. The anode of D1 must be placed next to Pins 7 and
8 in the PCB layout. Ground vias should be next to component
pads.
Crystal Oscillator
The crystal oscillator is the reference for the RF output
frequency as well as for the LO frequency in the receiver. The
crystal oscillator is a very critical block since very good phase
and frequency stability is required. The schematic of the
crystal  oscillator  with  external  components  for  10MHz  is
shown in Figure 4. These components are optimized for a
crystal with 15pF load capacitance.
? n is the ageing in ppm/year.
? ? t is the time (in years) elapsed since the transceiver
was last tuned.
The demodulator will not be able to decode data when
? f(Hz) = ? f(ppm) × f RF is larger than the FSK frequency
deviation. For small frequency deviations, the crystal should
be pre-aged, and should have a small temperature coeffi-
cient. The circuit has been tested with a 10MHz crystal, but
other crystal frequencies can be used as well.
Prestart of XCO
The start-up time of a crystal oscillator is typically some
milliseconds. Therefore, to save current consumption, the
MICRF500 circuit has been designed so that the XCO is
turned on before any other circuit block. During start-up the
XCO amplitude will eventually reach a sufficient level to
trigger the M-counter. After counting two M-counter output
pulses the rest of the circuit will be turned on. The current
consumption during the prestart period is approximately
300 μ A.
Lock Detector
The MICRF500 circuit has a lock detector feature that indi-
cates whether the PLL is in lock or not. A logic high on Pin 15
(LOCKDET) means that the PLL is in lock.
The phase detector output is converted into a voltage that is
filtered by the external capacitor C23, connected to Pin 14,
LDC. The resulting DC voltage is compared to a reference
window set by bits Ref0 – Ref5. The reference window can be
stepped up/down linearly between 0V, Ref0 – Ref5 = 1, and
Ref0 – Ref5 = 0, which gives the highest value (DC voltage)
of the reference window. The size of the window can either be
equal to two (Ref6 = 1) reference steps or four reference
steps (Ref6 = 0).
March 2003
9
MICRF500
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